Toshiba and Japan Semiconductor Demonstrate Simultaneous Optimization of ESD Tolerance and Power Efficiency for High Voltage LDMOS for Automotive Anal

Difference of parasitic bipolar action undergoing HBM testing in low-voltage and high-voltage LDMOS (Toshiba’s test results)

In low-voltage LDMOS, lateral parasitic bipolar action is dominant.
In high-voltage LDMOS, vertical parasitic bipolar action is dominant.